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Semiconductor Device Salt Spray Testing: Standards, Methods, and Acceptance Criteria

Salt spray testing, also known as salt fog or salt mist testing, is an accelerated corrosion test used to evaluate the resistance of semiconductor devices and their package hardware to salt-laden atmospheres typical of marine, coastal, and automotive environments. Performed in accordance with internationally recognized standards such as IEC 60068-2-52, MIL-STD-883 Method 1009, and JEDEC JESD22-A107, the test exposes packaged semiconductors to a controlled saline mist and then verifies both the physical integrity of leads and finishes and the electrical performance of the device. This article explains the applicable standards, sample types, test items, test methods, and acceptance criteria for semiconductor device salt spray testing.

Technical Overview

Salt spray testing is an accelerated laboratory corrosion method that exposes semiconductor devices to a finely atomized sodium chloride mist in a temperature-controlled chamber. Its purpose is to determine whether package materials, metallic leads, terminals, and protective plating finishes can withstand chloride-rich service environments without suffering corrosion that compromises mechanical integrity, solderability, or electrical performance. The test is particularly relevant for devices deployed in marine, coastal, automotive, and industrial settings where salt, moisture, and atmospheric pollutants act together on exposed metal surfaces.

For semiconductor products, the primary corrosion targets are external leads and terminals, lead-frame plating systems (such as matte tin, tin-lead, nickel-palladium-gold, and silver finishes), heat spreaders, package lids, and exposed substrate metallization. Chloride ions penetrate passive oxide films and initiate localized pitting, while condensed moisture films act as electrolytes that drive galvanic corrosion at dissimilar-metal interfaces, for example between copper alloy lead frames and tin plating, or between Kovar leads and glass-to-metal seals.

  • ISO 9227 and ASTM B117 define apparatus and operating conditions for neutral, acetic acid, and copper-accelerated salt spray methods
  • IEC 60068-2-11 (Test Ka) covers steady-state salt mist for electronic components, with GB/T 2423.17 as the corresponding Chinese national standard
  • IEC 60068-2-52 (Test Kb) specifies cyclic salt mist testing, with GB/T 2423.18 as the national equivalent
  • MIL-STD-883 Method 1009 defines the salt atmosphere test for microcircuits
  • JEDEC JESD22-A107 defines the salt atmosphere test for packaged semiconductor devices
  • JIS Z 2371 and GB/T 10125 provide additional nationally recognized salt spray test procedures

It is important to recognize that salt spray testing is a comparative, screening-oriented technique: it ranks platings, coatings, and package designs against one another rather than providing a direct quantitative prediction of field service life. For moisture-driven degradation mechanisms internal to a package, salt spray testing is typically complemented by biased humidity methods such as 85 °C / 85 %RH steady-state temperature-humidity or highly accelerated stress testing.

Testing Samples

Packaged Integrated Circuits

Logic, memory, analog, and mixed-signal ICs in plastic packages such as DIP, SOP, SSOP, QFP, QFN, and BGA are common test subjects. For leaded packages, evaluation focuses on lead plating integrity, pin-to-package interfaces, and the exposed die pad or heat slug; for area-array packages, attention is given to solder ball metallization, substrate edges, and any exposed copper features.

Discrete Semiconductor Devices

Diodes, rectifiers, bipolar transistors, MOSFETs, IGBTs, thyristors, LEDs, and optocouplers supplied in axial (DO-41, DO-201), through-hole (TO-92, TO-220, TO-247), and surface-mount (SOD-123, SOT-23) formats are frequently tested. The large copper tabs, exposed pads, and thick terminal metallization of power packages make them especially sensitive to salt-induced pitting and galvanic attack.

Power Modules and Hermetic Packages

IGBT and rectifier power modules with copper baseplates, heavy-gauge terminals, and soldered or bonded interfaces are evaluated for corrosion of baseplate surfaces and terminal joints. Hermetic ceramic and metal-can packages, including CERDIP, ceramic quad flat packs, and TO-series metal cans, are tested to confirm that lid seams, seal rings, and glass-to-metal feedthroughs resist chloride penetration.

Package Hardware and Metal Components

Lead frames, individual pins and tabs, heat sinks, lids, plating coupons, and connector terminals are often tested alongside finished devices as process control samples. These hardware elements allow plating thickness, porosity, and surface treatment quality to be assessed independently of device-level electrical behavior.

Testing Items

After exposure and recovery, samples are assessed against a defined set of physical, mechanical, and electrical criteria:

  • Corrosion appearance: presence and distribution of white rust, red rust, pitting, staining, blistering, and corrosion product creepage on leads, terminals, and package surfaces
  • Electrical performance: continuity, leakage currents, breakdown voltage, forward voltage drop, current gain, and functional parameter drift measured against pre-test data and datasheet limits
  • Lead and terminal integrity: lead pull strength, bend strength, pin straightness, and the absence of lead breakage or embrittlement after exposure
  • Marking legibility: verification that laser-marked or printed device markings remain fully readable after exposure and cleaning
  • Contact resistance and solderability: confirmation that corrosion has not increased contact resistance or degraded wettability beyond specified limits
  • Hermeticity: fine leak and gross leak testing of hermetic packages to verify that seals have not been compromised by the chloride environment

Testing Methods

Salt spray testing for semiconductor devices is performed in specialized chambers that generate a controlled saline fog. Method selection depends on the applicable product standard, the intended service environment, and whether a steady-state or cyclic exposure profile is required.

Neutral Salt Spray (NSS)

The most widely applied method uses a 5% sodium chloride solution with a pH of 6.5 to 7.2, atomized at 35 °C into a fine mist, with a fog collection rate of 1 to 2 mL per 80 cm² of horizontal collection area per hour. Governing documents include ISO 9227, ASTM B117, GB/T 10125, and JIS Z 2371. Common test durations are 24, 48, 96, and 168 hours, selected according to the severity of the target application.

Cyclic Salt Mist Testing

IEC 60068-2-52 (Test Kb), equivalent to GB/T 2423.18, combines short salt spray phases of two hours with seven-day humid storage periods at 40 °C and high relative humidity; the number of cycles is defined by the selected severity level. The alternating wet and semi-dry phases reproduce coastal service conditions more realistically than continuous spray and accelerate corrosion through repeated electrolyte replenishment and salt concentration cycling.

Salt Atmosphere Test for Microelectronics

MIL-STD-883 Method 1009 and JEDEC JESD22-A107 define device-level salt atmosphere exposures using a dilute saline mist maintained at 35 °C, typically for a minimum of 24 hours under the base test condition. Immediately after exposure, devices are washed in running water of the specified temperature, dried, and examined for corrosion of leads and packages, legibility of markings, and, where required, conformance to electrical specifications. Acceptance generally requires the absence of corrosion that would adversely affect device performance, lead integrity, or solderability.

Acidified and Copper-Accelerated Variants

Acetic acid salt spray (ASS), adjusted to a pH of approximately 3.1 to 3.3, and copper-accelerated acetic acid salt spray (CASS), which adds copper(II) chloride and operates near 50 °C, provide more aggressive corrosive attack. These variants are mainly used to evaluate decorative or engineering plating systems on package hardware rather than the semiconductor devices themselves.

Sample Preparation and Post-Test Handling

Samples are normally tested in the as-received condition, without any cleaning that would remove protective surface films. Devices are mounted on inert, non-corrosive racks inclined between 15° and 30° from vertical so that condensate drains freely and does not pool on critical surfaces. After exposure, samples are gently rinsed, dried, and inspected within the timeframe specified by the method, with electrical measurements taken after stabilization to avoid transient moisture effects.

Applications

Salt spray testing of semiconductor devices supports product qualification, material and plating selection, supplier quality control, and failure analysis across industries where chloride exposure is a realistic service condition:

  • Automotive electronics: engine management units, transmission controllers, body electronics, sensors, and lighting drivers exposed to road de-icing salts, splash zones, and high humidity
  • Marine and offshore systems: navigation, radar, communication, propulsion control, and deck equipment operating in high-chloride sea atmospheres
  • Telecommunications infrastructure: base stations, outdoor cabinets, and antenna electronics installed in coastal regions
  • Industrial equipment: control modules, motor drives, and instrumentation deployed in coastal plants and chemically aggressive facilities
  • Consumer electronics: validation of connectors, shields, fasteners, and enclosure hardware for products used in humid coastal climates
  • Aerospace and defense: ground-based, naval, and transportable electronic systems qualified to military environmental test standards

FAQ

Which standard applies to semiconductor device salt spray testing?

Component-level qualification typically references MIL-STD-883 Method 1009 or JEDEC JESD22-A107 for microcircuits and discrete semiconductor devices, while hardware- and system-level evaluations more often use ISO 9227, ASTM B117, or IEC 60068-2-52. The governing specification is usually dictated by the end customer, the product qualification standard, or the intended market sector.

How long does the test take?

Single-method neutral salt spray exposures commonly range from 24 to 168 hours, whereas cyclic tests per IEC 60068-2-52 span several weeks because each cycle includes a seven-day humid storage phase. Project scheduling should also allow time for pre-test inspection, sample stabilization, and post-test electrical verification.

Can salt spray results predict field service life?

No. Salt spray testing is an accelerated, comparative screening tool. It identifies weaknesses in platings, coatings, and package hardware, but it does not provide a quantitative correlation to service life in a specific environment, because real-world corrosion depends on pollutant mixtures, wet-dry cycling, temperature ranges, sheltering, and component orientation.

What are the typical acceptance criteria?

Typical requirements include no red rust or corrosion products that compromise lead integrity or solderability, electrical parameters remaining within datasheet limits, markings that remain legible, and hermetic packages that retain seal integrity. Light white tarnish on tin or silver finishes may be acceptable provided all functional requirements are still met.

How should samples be prepared and mounted?

Devices should be tested in the as-delivered state, placed so that the critical surfaces face the fog source, and inclined between 15° and 30° from vertical to prevent condensate pooling. Samples must not contact each other or corrosive fixture materials, and sufficient spacing must be maintained to ensure uniform exposure across the entire test lot.

Where should the testing be performed?

Testing should be carried out in accredited third-party laboratories or qualified in-house facilities whose salt spray chambers are calibrated and maintained in accordance with ISO 9227 or ASTM B117, with documented control of solution concentration, pH, chamber temperature, fog collection rate, and sample placement practices.

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